Area-Time Efficient Pipelined Number Theoretic Transform for CRYSTALS-Kyber
May 14, 2025
PLOS ONE - Volume 20(5), Article Number e0323224
UniHaCh: Unicode and Hash Function Supported with Counting and Frequency Recurrence of Arabic Characters for Quranic Text Watermarking
November 17, 2023
Arabian Journal for Science and Engineering - Pages 1-17
Approximate Computing: Hardware and Software Techniques, Tools and Their Applications
September 20, 2023
Journal of Circuits Systems and Computers - Pages 1-64
An Efficient IIoT-Based Smart Sensor Node for Predictive Maintenance of Induction Motors
June 07, 2023
Computer Systems Science and Engineering - Volume 47(1), Pages 255-272
Integrated representation for discrete Fourier and wavelet transforms using vector notation
July 01, 2022
Mehran University Research Journal of Engineering and Technology - Volume 41(3) 175-184
Segmented Multistage Reconstruction of Magnetic Resonance Images
November 30, 2021
Advances in Electrical and Computer Engineering - Volume 21, Issue 4, Pages 107-114
Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3
December 01, 2020
IEEE Transactions on Circuits and Systems I: Regular Papers (Early Access) - Volume 67, Issue 12
Resource-Efficient Image Buffer Architecture for Neighborhood Processor
October 15, 2020
IEEE Access - Volume 8, Pages 181964-181975
A Pareto-Optimal Multi-filter Architecture on FPGA for Image Processing Applications
October 01, 2019
Circuits Systems and Signal Processing - Volume 38, Issue 10, Pages 4762-4786
A new rectangular window based image cropping method for generalization of brain neoplasm classification systems
September 01, 2018
International Journal of Imaging Systems and Technology - NULL
Multi-Resolution Transforms Based Hybrid Feature Extraction Technique for Differentiating Glioma Grades.
July 20, 2018
International Journal of Wavelets, Multiresolution and Information Processing - Volume 16, No. 06, Article Number 1850048
An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing
April 24, 2017
Journal of Real-Time Image Processing - NULL
A Low Cost Structurally Optimized Design for Diverse Filter Types
November 10, 2016
PLoS ONE - Volume 11, Issue 11, Article number e0166056
A low-power SHA-3 designs using embedded digital signal processing slice on FPGA
October 01, 2016
Computers & Electrical Engineering - Volume 55, Pages 138-152
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA
March 01, 2016
Microprocessors and Microsystems - Volume 41, Pages 37-46
A FPGA based Reconfigurable 2D Filter Architecture for Biomedical Image Preprocessing
February 01, 2016
Caspian Journal of Applied Sciences Research - Vol.5(2), Pages 1-10
Resource Efficient Implementation of the Keccak, Skein & JH Algorithms on a Reconfigurable Platform
January 01, 2016
Cankaya University Journal of Science and Engineering - Volume 13, No. 1, Pages 40-57
Implementation of T-box/T-1-Box Based AES Design on Latest Xilinx FPGA
October 01, 2015
Mehran University Research Journal of Engineering and Technology - Volume 35 , Issue 4, Pages 441-446
Logically Grouped Reduced-set Implementation of SHA3-256 on FPGA
August 01, 2015
Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 13-20
A Robust Wavelet Based Digital Image Watermarking Technique Using FPGA
August 01, 2015
Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 139-148
Area Efficient S-Box Approach for SubByte Transformation in AES
August 01, 2015
Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 63-68
An efficient single unit T-box/T-1-box implementation for 128-bit AES on FPGA
June 01, 2015
Security and Communication Networks - Volume 8, Issue 9, Pages 1725-1731
FPGA Based Compact and Efficient Full Image Buffering for Neighborhood Operations
February 28, 2015
Advances in Electrical and Computer Engineering - Volume 15, Issue 1, Pages 95-104
FPGA Implementation of Advance Encryption Standard Using Xilinx System Generator
April 01, 2014
Asian Journal of Applied Sciences - Volume 02, Issue 02, Pages 190-198
Comparison between FPGA Logic Resources and Embedded Resources Used By Discrete Arithmetic (DA) Architecture to Design FIR Filter
April 01, 2014
International Journal of Scientific Engineering and Technology - Volume No.3 Issue No.4, Pages 440-443
Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform
January 12, 2014
Chinese Journal of Engineering - Volume 2014, Article ID 167184, 7 pages
Reduced Precision Redundancy for Satellite Telecommand Receiver Module on FPGA
September 24, 2013
Chinese Journal of Engineering - Volume 2013 , Article ID 453872, 8 pages
Xilinx System Generator® Based Implementation of a Novel Method of Extraction of Nonstationary Sinusoids
August 01, 2013
Journal of Signal and Information Processing - Volume 4, No. 3B, Pages 7-13
Efficient Hardware Implementation of SHA-3 Candidate Grostl using FPGA
October 01, 2012
International Journal of Computer Applications - Volume 55, No.15, Pages 6-11
Look-Up Table Based Implementations of SHA-3 Finalists: JH, Keccak and Skein
September 26, 2012
KSII Transactions on Internet and Information Systems - Vol. 6, No.9
Hardware Performance Evaluation of SHA-3 Finalists - Blake, Keccak and Skein
March 14, 2012
Arab Gulf Journal of Scientific Research - Volume 30, Issue 1, Pages 14-22
High Throughput Hardware Implementation of Secure Hash Algorithm Skein-256
November 30, 2011
International Journal of Academic Research - Vol. 3, No. 6, Part I, Pages 200-206
Efficient Software Implementation of Secure Hash Algorithm (Sha-3) Candidate-Skein
November 30, 2011
International Journal of Academic Research - Vol. 3. No. 6, Part II
Optimal utilization of available reconfigurable hardware resources
November 10, 2011
Computers & Electrical Engineering - Volume 37, Issue 6, Pages 1043-1057
Some Aspects of Deposition Parameters of RF Sputtered Ferromagnetic Film Germane to the Study of Magnetoresistive Sensing Devices
September 01, 2011
Advanced Materials Research - Vol. 264-265, Pages 160-165
Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA
April 30, 2010
Information Processing Letters - Volume 110, Issue 10, Pages 373-377
An FPGA Based AES-CCM Crypto Core for IEEE 802. 11i Architecture
September 01, 2007
International Journal of Network Security (IJNS) - Vol.5, No.2, Pages 224-232
Memory efficient implementation of AES S-BOXES on FPGA
August 01, 2007
Journal of Circuit Systems and Computers - Volume 16, Issue 4, Pages 603-611